Memory Usage and Linker Configuration

LPC4350FET256, LPC4357FET256 and LPC1850FET256 microcontrollers have different ammounts of internal flash and RAM memories:

Microcontroller Type FLASH (kB) RAM (kB)
LPC4350FET256 0 264
LPC4357FET256 1024 136
LPC1850FET256 0 200

In addition, the LPC4300 series microcontrollers have two cores that can run independently, using different memory ranges for program code and data. We provide a number of linker configuration files to encount all this variety of memory usage.

LPC4300 is a dual-core controller with Cortex-M4 and Cortex-M0 processors. Some of LPC4350-DB1 software examples are designed to use one of the processor cores, while others demonstrates the utilization of both cores and inter-process communication (IPC).

To separate memory used by each core we decided to assign SDRAM region with addresses from 0x10000000 to 0x1001FFFF to Cortex-M4 and region from 0x10080000 to 0x10089FFF to Cortex-M0 co-processor. Region from 0x1008A000 to 0x10092000 is used as shared memory.

IAR Examples
In IAR examples we use IAR linker scripts to specify the memory sections to be used by each of the LPC4300 controller cores:

LPC4300 Processor Core      Internal SRAM / External NOR Flash      Script File Name      View Source  
Cortex-M4     Internal SRAM     lpc_4350_db1_m4_iram.icf    source:/Linker/EWARM/lpc_4350_db1_m4_iram.icf
Cortex-M0     Internal SRAM     lpc_4350_db1_m0_iram.icf    source:/Linker/EWARM/lpc_4350_db1_m0_iram.icf

The lpc_4350_db1_m4_iram.icf file defines addresses for interrupt vector, ROM and RAM memories:

/*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = 0x10000000; /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; define symbol __ICFEDIT_region_ROM_end__ = 0x00000000; define symbol __ICFEDIT_region_RAM_start__ = 0x10000140; define symbol __ICFEDIT_region_RAM_end__ = 0x1001FFFF;

As we can see the interrupt vector is placed in the beginning of the internal SDRAM (address 0x10000000). 

The ROM region begins and ends at the same address - both application code and data are placed in the RAM region.

instructs IAR linker to plase both read-only (application code and constants) and read-write (variables) data in RAM region: